TSMC 3DFabric® is the Company’s comprehensive family of 3D silicon stacking and advanced packaging technologies. 3DFabric complements TSMC’s advanced semiconductor technologies that unleashes customer innovation.
Packaging technologies were once considered simple backend processes, almost an inconvenience. Times have changed. Computing workloads have increased dramatically over the past decade. Cloud computing, big data analytics, artificial intelligence (AI), neural network training, AI inferencing, mobile computing, and self-driving cars are pushing the computing envelope.
Modern computing workloads brought packaging technologies to the forefront so that today, they are critical to a product's performance, function, and cost. These workloads have also pushed product design to embrace a more holistic system-level optimization approach.
3DFabric provides ultimate flexibility to holistically design products as a mini-chip system that offers many advantages over larger monolithic die.
TSMC 3DFabric® offers 3D silicon stacking and advanced packaging technologies, such as TSMC-SoIC® (System on Integrated Chips), CoWoS® (Chip on Wafer on Substrate), and InFO (Integrated Fan-Out), to enable homogeneous and heterogeneous chip integration to meet customer requirements for high performance, high compute density and high energy efficiency, low latency, and high integration.
All diagrams, animations, and videos are for demonstrative and illustrative purposes only.
TSMC's 3DFabric provides the ultimate flexibility in product design for better performance, function, and cost-efficiency, bringing packaging technologies to the forefront of innovation.
Time-to-Market: Reuse technology blocks that change infrequently or are hard to scale to develop "chiplets" to shorten time-to-market
Performance and Efficiency: 3DFabric integrates high-density interconnected chips into a packaged module to deliver improved bandwidth, latency, and power efficiency
Form Factor: Integrate a variety of logic, memory, or specialty chips with SoCs to deliver smaller form factors
Cost: Reuse blocks, such as analog IO, RF, and those that do not change frequently nor scale well, on more mature and more cost effective semiconductor technologies. And focus on logic designs that scale well on TSMC’s most advanced semiconductor technologies
