InFO is an innovative wafer-level system integration technology featuring a high-density redistribution layer (RDL) and Through-InFO Vias (TIVs) for high-density interconnect and performance across a variety of applications, including mobile and high-performance computing (HPC). InFO offers 2.5D and 3D options optimized for specific applications.
TSMC’s Integrated Fan-Out Package on Package (InFO-PoP), the industry’s first 3D wafer-level fan-out package, features a high-density RDL and TIVs to integrate mobile application processors with dynamic random-access memory (DRAM). InFO-PoP has better electrical and thermal performance, and a thinner profile than flip chip package-on-package, because it has no organic substrate or C4 bump.
TSMC’s Integrated Fan-Out on Substrate (InFO-oS) leverages Integrated Fan-Out (InFO) technology and features a higher density re-distribution interconnection (RDL) line width/space to integrate multiple advanced logic chiplets. More chiplet packaging adoption is expected in a variety of next-generation products.
